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  4. <TITLE>D-BUG12 Emulation</TITLE>
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  7. <H1>D-BUG12 Emulation</H1>
  8. <P>In order to allow the same program to run in the D-BUG12 environment and in the simulator, a D-BUG12 emulator,
  9. <A HREF="../../sources/dbug12.asm">DBUG12.ASM</A>, was written. This emulator has the following functionality:</P>
  10. <UL>
  11. <LI>Handles the reset vector (at $FFFE-FFFF)</LI>
  12. <LI>Implements the SetUserVector function</LI>
  13. <LI>Allows SWI to end program execution</LI>
  14. <LI>"Traps" on all interrupt vectors that are not set by the user.</LI>
  15. </UL>
  16. <P>The emulator also disables the COP timer, enables serial port 0 to 9600 BPS, and configures the clock stretch.</P>
  17. <P>Naturally, a full D-BUG12 emulation is not necessary, because the 68HC12 simulator has most of the capabilities of
  18. the D-BUG12 user interface. The adventuresome can install the full DBUG12 program into the simulator and run it --
  19. yes it does work!</P>
  20. <H2>Instructions For Use</H2>
  21. <OL>
  22. <LI>Assemble DBUG12.ASM into DBUG12.S19, if not already done.</LI>
  23. <LI>Start the simulator.</LI>
  24. <LI>Load your program you want to simulate and DBUG12.S19.</LI>
  25. <LI>Do a Reset, then press the "Go" button. Execution will stop at a BGND instruction.</LI>
  26. <LI>Set the PC register to the address of the start of your program. If your program starts at $4000, this step is not
  27. necessary.</LI>
  28. <LI>Use the simulator normally to step or run your program.</LI>
  29. <LI>If execution stops with a D-BUG12 BGND instruction, with the next instruction displayed being a "BRA", register
  30. X contains the vector number of the interrupt that occurred. For instance $1B = 27, which would be an SWI
  31. instruction interrupt - the normal way of terminating a program under D-BUG12.</LI>
  32. <LI>If execution stops with a D-BUG12 BGND instruction where the next instruction displayed being a "RTS", this is
  33. an un-implemented D-BUG12 routine. Feel free to write it for extra credit.</LI>
  34. </OL>
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